PIC18F258-ESLASHLSQTP datasheet(307/402 Pages) MICROCHIP

307 / 402 page

DS41159E-page 305

PIC18FXX8

LFSR

Load FSR

Syntax:

[

label ]

LFSR f,k

Operands:

≤ f ≤ 2

≤ k ≤ 4095

Operation:

→ FSRf

Status Affected:

None

Encoding:

1110

1111

1110

0000

00ff

k7kkk

k11kkk

kkkk

Description:

The 12-bit literal ‘k’ is loaded into the

file select register pointed to by ‘f’.

Words:

Cycles:

Q Cycle Activity:

Decode

Read literal

‘k’ MSB

Process

Data

Write

literal ‘k’

MSB to

FSRfH

Decode

Read literal

‘k’ LSB

Process

Data

Write literal

‘k’ to FSRfL

Example:

LFSR 2, 0x3AB

After Instruction

FSR2H

0x03

FSR2L

0xAB

MOVF

Move f

Syntax:

[

label ]

MOVF

f [,d [,a]]

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

→ dest

Status Affected:

N, Z

Encoding:

0101

00da

ffff

Description:

The contents of register ‘f’ are moved to

a destination dependent upon the

status of ‘d’. If ‘d’ is ‘0’, the result is

placed in W. If ‘d’ is ‘1’, the result is

placed back in register ‘f’ (default).

Location ‘f’ can be anywhere in the

256-byte bank. If ‘a’ is ‘0’, the Access

Bank will be selected, overriding the

BSR value. If ‘a’ = 1, then the bank will

be selected as per the BSR value

(default).

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write W

Example:

MOVF

REG, W

Before Instruction

REG

0x22

0xFF

After Instruction

REG

0x22

PIC18F258-E/LSQTP Datasheet(PDF) 307 Page - Microchip Technology

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