PIC18F258-ESLASHLSQTP datasheet(353/402 Pages) MICROCHIP

353 / 402 page

DS41159E-page 351

PIC18FXX8

FIGURE 27-15:

EXAMPLE SPI™ SLAVE MODE TIMING (CKE = 0)

TABLE 27-15: EXAMPLE SPI™ MODE REQUIREMENTS, SLAVE MODE TIMING (CKE = 0)

Param

No.

Symbol

Characteristic

Min

Max Units Conditions

TssL2scH,

TssL2scL

↓ to SCK ↓ or SCK ↑ Input

TCY

—ns

TscH

SCK Input High Time (Slave mode)

Continuous

1.25 TCY + 30

—

71A

Single Byte

—

(Note 1)

TscL

SCK Input Low Time (Slave mode)

Continuous

1.25 TCY + 30

—

72A

Single Byte

—

(Note 1)

TdiV2scH,

TdiV2scL

Setup Time of SDI Data Input to SCK Edge

100

—

73A

TB2B

Last Clock Edge of Byte 1 to the 1st Clock Edge of Byte 2 1.5 TCY + 40

—

(Note 2)

TscH2diL,

TscL2diL

Hold Time of SDI Data Input to SCK Edge

100

—

TdoR

SDO Data Output Rise Time

PIC18FXX8

—

PIC18LFXX8

TdoF

SDO Data Output Fall Time

—

TssH2doZ SS

↑ to SDO Output High-Impedance

TscR

SCK Output Rise Time (Master mode) PIC18FXX8

—

PIC18LFXX8

TscF

SCK Output Fall Time (Master mode)

—

TscH2doV,

TscL2doV

SDO Data Output Valid after SCK

Edge

PIC18FXX8

—

PIC18LFXX8

100

TscH2ssH,

TscL2ssH

↑ after SCK Edge

1.5 TCY + 40

—

Note 1:

Requires the use of parameter #73A.

Only if parameter #71A and #72A are used.

SCK

(CKP = 0)

SCK

(CKP = 1)

SDO

SDI

75, 76

MSb

LSb

Bit 6 - - - - - -1

Bit 6 - - - -1

LSb In

Note: Refer to Figure 27-5 for load conditions.

MSb In

PIC18F258-E/LSQTP Datasheet(PDF) 353 Page - Microchip Technology

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