PC312XDP512F0CFVR datasheet(1017/1350 Pages) FREESCALE

1017 / 1350 page

This register always reads back the buffered state of the associated pins. This can also be used to

detect overload or short circuit conditions on output pins.

24.0.5.44 Port H Data Direction Register (DDRH)

Read: Anytime.

Write: Anytime.

This register configures each port H pin as either input or output.

If the associated routed SPI module is enabled this register has no effect on the pins.

If a SPI module is enabled, the SPI determines the pin direction. Refer to SPI section for details.

The DDRH bits revert to controlling the I/O direction of a pin when the associated peripheral

modules are disabled.

24.0.5.45 Port H Reduced Drive Register (RDRH)

Read: Anytime.

Write: Anytime.

This register configures the drive strength of each Port H output pin as either full or reduced. If the

port is used as input this bit is ignored.

76543210

DDRH7

DDRH6

DDRH5

DDRH4

DDRH3

DDRH2

DDRH1

DDRH0

Reset

00000000

Figure 24-46. Port H Data Direction Register (DDRH)

Table 24-41. DDRH Field Descriptions

Field

Description

7–0

DDRH[7:0]

Data Direction Port H

0 Associated pin is conﬁgured as input.

1 Associated pin is conﬁgured as output.

Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is read

on PTH or PTIH registers, when changing the DDRH register.

76543210

RDRH7

RDRH6

RDRH5

RDRH4

RDRH3

RDRH2

RDRH1

RDRH0

Reset

00000000

Figure 24-47. Port H Reduced Drive Register (RDRH)

PC312XDP512F0CFVR Datasheet(PDF) 1017 Page - Freescale Semiconductor, Inc

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