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ST72F521 Datasheet(PDF) 178 Page - STMicroelectronics

Part # ST72F521
Description  80/64-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE
PDF  215 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72F521 Datasheet(HTML) 178 Page - STMicroelectronics

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ST72F521, ST72521B
178/215
12.6 MEMORY CHARACTERISTICS
12.6.1 RAM and Hardware Registers
12.6.2 FLASH Memory
Notes:
1. Minimum VDD supply voltage without losing data stored in RAM (in HALT mode or under RESET) or in hardware reg-
isters (only in HALT mode). Not tested in production.
2. Data based on characterization results, not tested in production.
3. VPP must be applied only during the programming or erasing operation and not permanently for reliability reasons.
4. Data based on simulation results, not tested in production.
Warning: Do not connect 12V to VPP before VDD is powered on, as this may damage the device.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VRM
Data retention mode 1)
HALT mode (or RESET)
1.6
V
DUAL VOLTAGE HDFLASH MEMORY
Symbol
Parameter
Conditions
Min 2)
Typ
Max 2)
Unit
fCPU
Operating frequency
Read mode
0
8
MHz
Write / Erase mode
1
8
VPP
Programming voltage 3)
4.5V
≤ V
DD ≤ 5.5V
11.4
12.6
V
IDD
Supply current4)
RUN mode (fCPU = 4MHz)
3
mA
Write / Erase
0
Power down mode / HALT
1
10
µA
IPP
VPP current
4)
Read (VPP=12V)
200
Write / Erase
30
mA
tVPP
Internal VPP stabilization time
10
µs
tRET
Data retention
TA=55°C
20
years
NRW
Write erase cycles
TA=25°C
100
cycles
TPROG
TERASE
Programming or erasing tempera-
ture range
-40
25
85
°C



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