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LAN9252/ML Datasheet(PDF) 158 Page - Microchip Technology |
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LAN9252/ML Datasheet(HTML) 158 Page - Microchip Technology |
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158 / 329 page  LAN9252 DS00001909A-page 158 2015 Microchip Technology Inc. 11.2.16.11 PHY x MMD Access Address/Data Register (PHY_MMD_ADDR_DATA) This register in conjunction with the PHY x MMD Access Control Register (PHY_MMD_ACCESS) provides indirect access to the MDIO Manageable Device (MMD) registers. Refer to the MDIO Manageable Device (MMD) Registers on page 175 for additional details. Index (In Decimal): 14 Size: 16 bits Bits Description Type Default 15:0 MMD Register Address/Data If the MMD Function field of the PHY x MMD Access Control Register (PHY_MMD_ACCESS) is “00”, this field is used to indicate the MMD register address to read/write of the device specified in the MMD Device Address (DEVAD) field. Otherwise, this register is used to read/write data from/to the previously specified MMD address. R/W 0000h |
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