PIC24FJ256GA705-ISLASHM4. datasheet(293/412 Pages) MICROCHIP

293 / 412 page

 2016 Microchip Technology Inc.

DS30010118B-page 293

PIC24FJ256GA705 FAMILY

AD1CON1: A/D CONTROL REGISTER 1

R/W-0

U-0

R/W-0

ADON

—ADSIDL

DMABM(1)

DMAEN

MODE12

FORM1

FORM0

bit 15

bit 8

R/W-0

U-0

R/W-0

R/W-0, HSC

R/C-0, HSC

SSRC3

SSRC2

SSRC1

SSRC0

—

ASAM

SAMP

DONE

bit 7

bit 0

Legend:

C = Clearable bit

U = Unimplemented bit, read as ‘0’

R = Readable bit

W = Writable bit

HSC = Hardware Settable/Clearable bit

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

ADON:

A/D Operating Mode bit

= A/D Converter is operating

= A/D Converter is off

bit 14

Unimplemented:

Read as ‘0’

bit 13

ADSIDL:

A/D Stop in Idle Mode bit

= Discontinues module operation when device enters Idle mode

= Continues module operation in Idle mode

bit 12

DMABM:

Extended DMA Buffer Mode Select bit(1)

= Extended Buffer mode: Buffer address is defined by the DMADSTn register

= PIA mode: Buffer addresses are defined by the DMA Controller and AD1CON4<2:0>

bit 11

DMAEN:

Extended DMA/Buffer Enable bit

= Extended DMA and buffer features are enabled

= Extended features are disabled

bit 10

MODE12:

A/D 12-Bit Operation Mode bit

= 12-bit A/D operation

= 10-bit A/D operation

bit 9-8

FORM<1:0>:

Data Output Format bits (see formats following)

= Fractional result, signed, left justified

= Absolute fractional result, unsigned, left justified

= Decimal result, signed, right justified

= Absolute decimal result, unsigned, right justified

bit 7-4

SSRC<3:0>:

Sample Clock Source Select bits

0000

= SAMP is cleared by software

0001

= INT0

0010

= Timer3

0100

= CTMU trigger

0101

= Timer1 (will not trigger during Sleep mode)

0110

= Timer1 (may trigger during Sleep mode)

0111

= Auto-Convert mode

bit 3

Unimplemented:

Read as ‘0’

bit 2

ASAM:

A/D Sample Auto-Start bit

= Sampling begins immediately after last conversion; SAMP bit is auto-set

= Sampling begins when SAMP bit is manually set

Note 1:

This bit is only available when Extended DMA and buffer features are available (DMAEN = 1).

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