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PIC24FJ256GA705-I/M4. Datasheet(PDF) 338 Page - Microchip Technology |
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PIC24FJ256GA705-I/M4. Datasheet(HTML) 338 Page - Microchip Technology |
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338 / 412 page  PIC24FJ256GA705 FAMILY DS30010118B-page 338 2016 Microchip Technology Inc. REGISTER 29-8: FICD CONFIGURATION REGISTER U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1 — — — — — — — — bit 23 bit 16 U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1 — — — — — — — — bit 15 bit 8 r-1 U-1 R/PO-1 U-1 U-1 U-1 R/PO-1 R/PO-1 — —JTAGEN — — — ICS1 ICS0 bit 7 bit 0 Legend: PO = Program Once bit r = Reserved bit R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 23-8 Unimplemented: Read as ‘1’ bit 7 Reserved: Maintain as ‘1’ bit 6 Unimplemented: Read as ‘1’ bit 5 JTAGEN: JTAG Port Enable bit 1 = JTAG port is enabled 0 = JTAG port is disabled bit 4-2 Unimplemented: Read as ‘1’ bit 1-0 ICS<1:0>: ICD Communication Channel Select bits 11 = Communicates on PGC1/PGD1 10 = Communicates on PGC2/PGD2 01 = Communicates on PGC3/PGD3 00 = Reserved; do not use |
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