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PIC24FJ256GA705-I/M4. Datasheet(PDF) 116 Page - Microchip Technology |
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PIC24FJ256GA705-I/M4. Datasheet(HTML) 116 Page - Microchip Technology |
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116 / 412 page  TABLE 10-2: PERIPHERAL MODULE DISABLE REGISTER SUMMARY Register Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 All Resets PMD1 — — T3MD T2MD T1MD — — — I2C1MD U2MD U1MD SPI2MD SPI1MD — — ADCMD 0000 PMD2 — — — — — IC3MD IC2MD IC1MD — — — — — OC3MD OC2MD OC1MD 0000 PMD3 — — — — — CMPMD RTCCMD PMPMD CRCMD — — — — —I2C2MD — 0000 PMD4 — — — — — — — — — — — —REFOMD CTMUMD LVDMD — 0000 PMD5 — — — — — — — — — — — — CCP4MD CCP3MD CCP2MD CCP1MD 0000 PMD6 — — — — — — — — — — — — — — —SPI3MD 0000 PMD7 — — — — — — — — — — DMA1MD DMA0MD — — — — 0000 PMD8 — — — — — — — — — — — — CLC2MD CLC1MD — — 0000 Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. |
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