L9679P datasheet(165/279 Pages) STMICROELECTRONICS

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DS11627 Rev 7

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L9679P

Deployment drivers

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The simplification in the calculation method reported above can result in some amount of

error that is already incorporated in the overall tolerance of the squib/pyroswitch resistance

measurement reported in the electrical parameters table.

Values of each measurement step can be required addressing the proper ADCREQx code

in Section 7.4.32: ADC request and data registers (DIAGCTRL_x).

This calculation is tolerant to leakages and, thanks to a dedicated EMI low-pass filter, also to

high frequency noises on squib/pyroswitch lines. Moreover, L9679P features a slew rate

control on the ISRC current generator to mitigate emissions.

High squib/pyroswitch resistance diagnostics

With this test, the device is able to understand if the squib/pyroswitch resistance value is

below 200 Ω, between 500 Ω and 2000 Ω or beyond 5000 Ω. During a high squib/pyroswitch

resistance diagnostics, VRCM and ISNK are enabled and connected respectively to SFx

and SRx on the selected channel. VREF voltage level will be output on SFx. Current flowing

on SFx will be measured and compared to ISRlow and ISRhigh thresholds to identify if the

resistance is above or below RSRlow or RSRhigh levels. The results are reported in the

LPDIAGSTAT register. The relative flags (HSR_HI and HSR_LO) are not latched and reflect

the current status of the comparators.

High and low side FET diagnostics

This couple of tests can only be run during the diagnostic mode of the power-up sequence

shown in Figure 10. Tests are performed individually for HS driver or LS driver, with two

dedicated commands. Prior to either the HS or LS FET diagnostics being run, the VRCM

has to be first enabled. Within the command to enable the VRCM, also the channel onto

which the FET test will be run has to be selected with the LEAK_CHSEL bit field. Running

the leakage diagnostics with the appropriate delay time prior to either the HS or LS FET

diagnostics will precondition the squib/pyroswitch pin to the appropriate voltage level. When

the FET diagnostic command is issued with the Diagnostic Register SPI command

(SYSDIAGREQ), the VRCM flags will be cleared, the VRCM deglitch filter time is switched

from the leakage diagnostic deglitch filter time (TFLT_LKG) to the FET test deglitch filter

time (TFLT_LKGB_FT) for both HS and LS and the output of the VRCM deglitch filter is now

allowed to disable the appropriate HS or LS squib/pyroswitch driver during FET test.

The device monitors the current through the VRCM. If the FET is working properly, this

current will exceed IHS_FET_TH or ILS_FET_TH current threshold, respectively for HS or LS

FET test for the deglitch filter time of TFLT_LKGB_FT, and the driver under test is turned off

immediately and automatically.

If there is a substantial leakage fault to Vbat or GND present during the FET test, leading

this leakage current to exceed the IHS_FET_TH or ILS_FET_TH current threshold, for the

deglitch filter time of TFLT_LKGB_FT, then the driver under test is turned off immediately

and automatically, and the corresponding VRCM flag, STG or STB, is set.

If the current does not exceed the current threshold, the test will be terminated and the

driver is anyway turned off within TFETTIMEOUT.

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