L9680 datasheet(162/286 Pages) STMICROELECTRONICS

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Deployment drivers

L9680

162/286

DS11615 Rev 7

Deployment drivers

The squib/pyroswitch deployment block consists of 12 independent high-side drivers and 12

independent low-side drivers. Squib/pyroswitch deployment logic requires a deploy

command received through SPI communications and either an arming condition processed

by safing logic or a proper ARMx input pin assessment, depending on whether the internal

safing engine is used or not. Both conditions must exist in order for the deployment to occur.

Once a deployment is initiated, it can only be terminated by an SSM_RESET event.

L9680 allows all 12 squib/pyroswitch loops to be deployed at the very same time or in other

possible timing sequences. Deployment drivers are capable of granting a successful

deployment also in case of short to ground on low-side circuit (SRx pins). Firing voltage

capability across high-side circuit is maximum 25 V. High-side and low-side drivers account

for a maximum series total resistance of 2 . Each loop is granted for a minimum number of

deployments of 50, under all normal operating conditions and with a deployment repetition

time higher than 10s. Both the High and the low-side FET drivers are equipped with passive

gate turn-off circuitries to guarantee the FETs are kept in off state also when the device is

unpowered or during power-up/down transients.

8.1

Control logic

A block diagram representing the deployment driver logic is shown below. Deployment

driver logic features include:



Deploy command logic



Deployment current selection



Deployment current monitoring and deploy success feedback



Diagnostic control and feedback

Figure 28. Deployment driver control blocks

GAPGPS02276

Deploy

Request

Validation

Deployment

Control &

Timing

High

Side

FET

Low

Side

FET

Current

Monitor

DCR

DSRx

DEPCOM

Deployment

Command Register

Deployment

Configuration

DCMTSx

ARM4

Deployment Configuration

DCR

Deployment

Configuration

DCR

Deploy Current

Monitor Status

Deployment Status

SFx

SRx

intclk

ITHDEPL

Safing Engine

Tristate enabler

ARM1-3

Int/Ext safing engine

Programmable

Loop

Assignments

Programmable

Loop

Assignments

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