MPF0900AMBA2ES datasheet(158/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

FCCUx_RESET[1:0]

FCCUx event reaction

No reset (only FS0B)

Soft reset (FS0B + supply recovery)

Hard reset (full power reset)

No reset (only FS0B)

Table 207. FCCUx reaction configuration bit

FCCU monitoring is always disabled during the Low-power STANDBY and OFF states.

In the Monitored STANDBY state, the system is considered to be in the safe state with the FS0B asserted LOW.

In this scenario, the FCCU interface is able to detect a real-time fault condition on the FCCUx pins by reading

the FCCUx_S bits, however no fault reaction or FCCU interrupts will be generated while the system is in the

Monitored STANDBY state.

Full FCCU monitoring is available during the RUN state as described in this section.

When the FCCU is enabled, the device starts monitoring the FCCU inputs from the MCU as soon as it enters

the RUN state.

At power up, the MCU may not have proper control of the FCCU signals, which may result in random fault

conditions observed in the FCCU pins during the booting phase. To prevent any false protection, the FCCU

interface is defaulted to have effect only over the FS0B pin.

When the MCU is able to provide proper signals in the FCCU pins, it can then configure the system reaction

mode and then proceed to release the FS0B to start monitoring the system during normal operation. Refer to

section 16.4.2 Reset Conditions for detail description of the soft and hard reset reactions.

The FCCU interface will detect and react to a new fault condition only while the FS0B is released. Fault

conditions detected while the FS0B is already asserted LOW will not increase the fault counter nor start any

protective reaction.

An FCCU fault detection will always assert the FS0B pin. If the FCCU interface is detecting a fault condition, the

FS0B will not be released until all fault conditions are removed.

The FCCU pins have configurable internal pullup or pulldown resistors, to ensure a pin disconnect is properly

detected as a fault condition. By default, the internal pull resistors are enabled at power up, and the system can

disable the pull resistor during the SYSTEM ON states via the respective FCCUx_RPULL_EN bits.

FCCUx_RPULL_EN

FCCU Internal pull resistors

Internal resistor disabled

Internal resistor enabled

Table 208. FCCUx internal pull resistor selection bits

The direction of the internal pull resistors is automatically selected based on the mode of operation and the

selected pin polarity, as described in the following sections.

14.7.1 FCCU full bistable operation

When OTP_FCCU0_MODE[1:0] = 11 and OTP_FCCU1_MODE[1:0] = 00 or 01, the FCCU interface will be set

to full bistable mode by default. In this mode, both the FCCU0 and FCCU1 will be set to detect a bistable fault

condition when the state machine is in the RUN or Monitored STANDBY state.

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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