STM32L4P5CEI3 datasheet(309/311 Pages) STMICROELECTRONICS

309 / 311 page

DS12903 Rev 2

309/311

STM32L4P5xx

Revision history

310

Revision history

Table 137. Document revision history

Date

Revision

Changes

19-Dec-2019

Initial release.

10-Mar-2020

Updated Cover.

Updated ‘DAC1&2’ in ‘DAC1’ in:

– Figure 1: STM32L4P5xx block diagram.

– Table 2: STM32L4P5xx features and peripheral counts.

– Table 4: STM32L4P5xx modes overview.

– Table 5: Functionalities depending on the working mode.

– Table 6: STM32L4P5xx peripherals interconnect matrix.

– Table 51: STM32L4P5xx peripheral current consumption

Updated VDD12 voltage range ‘1.00 V to1.32 V’ in:

– Section 3.7.1: Power supply schemes.

– Figure 26: STM32L4P5xx power supply scheme.

Updated:

– Table 14: Legend/abbreviations used in the pinout table adding note.

– Table 18: Voltage characteristics VREF+ data.

Updated current consumptions in:

– Table 25: Current consumption in Run and Low-power run modes,

code with data processing running from Flash in single Bank, ART

enable (Cache ON Prefetch OFF).

– Table 26: Current consumption in Run and Low-power run modes,

code with data processing running from Flash in single Bank, ART

enable (Cache ON Prefetch OFF) and power supplied by external

SMPS.

– Table 27: Current consumption in Run and Low-power run modes,

code with data processing running from Flash in dual bank, ART

enable (Cache ON Prefetch OFF).

– Table 28: Consumption in Run and Low-power run modes, code with

data processing running from Flash in dual bank, ART enable (Cache

ON Prefetch OFF) and power supplied by external SMPS.

– Table 29: Current consumption in Run and Low-power run modes,

code with data processing running from Flash in single bank, ART

disable.

– Table 30: Current consumption in Run and Low-power run modes,

code with data processing running from Flash in single bank, ART

disable and power supplied by external SMPS.

– Table 31: Current consumption in Run and Low-power run modes,

code with data processing running from Flash in dual bank, ART

disable.

– Table 32: Current consumption in Run and Low-power run modes,

code with data processing running from Flash in dual bank, ART

disable and power supplied by external SMPS.

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