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R5F5671CDDFB Datasheet(PDF) 164 Page - Renesas Technology Corp |
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R5F5671CDDFB Datasheet(HTML) 164 Page - Renesas Technology Corp |
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164 / 179 page  R01DS0373EJ0120 Rev.1.20 Page 164 of 179 Sep 30, 2024 RX671 Group 2. Electrical Characteristics Note 1. Definition of program/erase cycle: The program/erase cycle is the number of erasing for each block. When the number of program/erase cycles is n, each block can be erased n times. For instance, when 4-byte program is performed 512 times for different addresses in 2-Kbyte block and then the block is erased, the program/erase cycle is counted as one. However, the same address cannot be programmed more than once before the next erase cycle (overwriting is prohibited). Note 2. Characteristics are degraded as the number of program/erase increases. This is the minimum value of program/erase cycles to guarantee all characteristics listed in this table. Note 3. This shows the characteristic when the flash memory writer or self-programming library from Renesas Electronics is in use, and the number of times programming and erasure proceed does not exceed the specified value. Note 4. These values are based on the results of reliability testing. Table 2.62 Data Flash Memory Characteristics Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0, VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V, Temperature range for programming/erasure: Ta = Topr Item Symbol FCLK = 4 MHz FCLK = 15 MHz 20 MHz ≤ FCLK ≤ 60 MHz Unit Test Conditions Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Programming time 4 bytes tDP4 — 0.36 3.8 — 0.18 1.9 — 0.16 1.7 ms Erasure time 64 bytes tDP64 —3.1 18 —1.9 11 —1.7 10 ms 128 bytes tDP128 —4.7 27 —2.9 16 —2.6 15 ms 256 bytes tDP256 —8.9 50 —5.4 31 —4.9 28 ms Blank check time 4 bytes tDBC4 —— 84 —— 33 —— 30 µs 64 bytes tDBC64 — — 280 — — 110 — — 100 µs 2 Kbytes tDBC2K — — 6160 — — 2420 — — 2200 µs Reprogramming/erasure cycle*1 NDPEC 100000 *2 — — 100000 *2 — — 100000 *2 —— Times Suspend delay time during programming tDSPD — — 264 — — 132 — — 120 µs First suspend delay time during erasure (in suspend prior- ity mode) 64 bytes — — — 216 — — 132 — — 120 µs 128 bytes — — — 216 — — 132 — — 120 µs 256 bytes — — — 216 — — 132 — — 120 µs Second suspend delay time during erasure (in suspend prior- ity mode) 64 bytes — — — 300 — — 300 — — 300 µs 128 bytes — — — 390 — — 390 — — 390 µs 256 bytes — — — 570 — — 570 — — 570 µs Suspend delay time during eras- ing (in erasure prior- ity mode) 64 bytes — — — 300 — — 300 — — 300 µs 128 bytes — — — 390 — — 390 — — 390 µs 256 bytes — — — 570 — — 570 — — 570 µs Forced stop command tFD —— 32 —— 22 —— 20 µs Data hold time*3, *4 tDDRP 20 — — 20 — — 20 — — Year Ta ≤ 85°C 10 — — 10 — — 10 — — Ta ≤ 105°C |
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