Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

Preview PDF HTML

ST7263B Datasheet(PDF) 119 Page - STMicroelectronics

Part # ST7263B
Description  LOW SPEED USB 8-BIT MCU FAMILY WITH FLASH/ROM, UP TO 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I²C
PDF  132 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7263B Datasheet(HTML) 119 Page - STMicroelectronics

Back Button ST7263B Datasheet HTML 115Page - STMicroelectronics ST7263B Datasheet HTML 116Page - STMicroelectronics ST7263B Datasheet HTML 117Page - STMicroelectronics ST7263B Datasheet HTML 118Page - STMicroelectronics ST7263B Datasheet HTML 119Page - STMicroelectronics ST7263B Datasheet HTML 120Page - STMicroelectronics ST7263B Datasheet HTML 121Page - STMicroelectronics ST7263B Datasheet HTML 122Page - STMicroelectronics ST7263B Datasheet HTML 123Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 119 / 132 page
background image
ST7263B
119/132
13.11 8-BIT ADC CHARACTERISTICS
Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.
Figure 78. Typical Application with ADC
Notes:
1. Unless otherwise specified, typical data are based on TA=25°C and VDD-VSS=5V. They are given only as design guide-
lines and are not tested.
2. When VDDA and VSSA pins are not available on the pinout, the ADC refer to VDD and VSS.
3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k
Ω). Data
based on characterization results, not tested in production.
4. The stabilization time of the AD converter is masked by the first tLOAD. The first conversion after the enable is then
always valid.
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
fADC
ADC clock frequency
4
MHz
VAIN
Conversion range voltage 2)
VSSA
VDDA
V
RAIN
External input resistor
10 3)
k
Ω
CADC
Internal sample and hold capacitor
6
pF
tSTAB
Stabilization time after ADC enable
fCPU=8MHz, fADC=2MHz
0 4)
µs
tADC
Conversion time (Sample+Hold)
6
- Sample capacitor loading time
- Hold conversion time
4
8
1/fADC
AINx
ST72XXX
CIO
~2pF
VDD
IL
±1
µA
VT
0.6V
VT
0.6V
VAIN
RAIN
VDDA
VSSA
0.1
µF
VDD
ADC



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com