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R8C2K Datasheet(PDF) 374 Page - Renesas Technology Corp |
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R8C2K Datasheet(HTML) 374 Page - Renesas Technology Corp |
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374 / 471 page ![]() R8C/2K Group, R8C/2L Group 19. A/D Converter Rev.1.10 Dec 21, 2007 Page 357 of 450 REJ09B0406-0110 Figure 19.7 ADCON1 Register in Repeat Mode A/D Control Register 1 (1) Symbol Address After Reset ADCON1 00D7h 00h Bit Symbol Bit Name Function RW NOTES: 1. 2. 3. When the VCUT bit is set to 1 (connected) from 0 (not connected), w ait for 1 µs or more before starting A/D conversion. b3 b2 VCUT b1 b0 0 00 Refer to the description of the CKS0 bit in the ADCON0 register function. b7 b6 b5 b4 — (b2-b0) 001 0 BITS RW If the ADCON1 register is rew ritten during A/D conversion, the conversion result is undefined. CKS1 RW RW RW — (b6-b7) Reserved bits Set the BITS bit to 0 (8-bit mode) in repeat mode. VREF connect bit(3) 1 : VREF connected Reserved bits Set to 0. 8/10-bit mode select bit(2) 0 : 8-bit mode RW Set to 0. Frequency select bit 1 |
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