R8C2K datasheet(468/471 Pages) RENESAS

468 / 471 page

C - 1

REVISION HISTORY

R8C/2K Group, R8C/2L Group Hardware Manual

Rev.

Date

Description

Page

Summary

0.10

Jul 20, 2007

−

First Edition issued

0.20

Aug 31, 2007

108

Figure 12.11 “UART1 receive”, “UART1 transmit” deleted

199

Figure 16.50

“

• The CCLR bit in the TRCCR1 register is set to 0 .... compare match).”

→ “• The CCLR bit in the TRCCR1 register is set to 1 .... compare

match).”

200

Table 16.20 “j = A, B, C, or D”

→ “ j = B, C, or D”

254

Figure 16.96 revised

338

Figure 18.9

“When the SBE bit .... timer RA may be used in timer mode after the

SBDCT flag in the LINST register is set to 1.”

→ “When the SBE bit ....

timer RA can be used in timer mode after the SBDCT flag in the LINST

355

Figure 19.10

“SW5 conducts when compare operation is in progress.” added

442

Appendix Figure 2.1 revised

1.00

Nov 7, 2007

All pages “Preliminary” deleted

3, 5

Table 1.2, Table 1.4;

Current consumption: “TBD”

→ “Typ. 10 mA” “Typ. 6 mA” “Typ. 2.0 µA”

“Typ. 0.7

µA” revised

6, 7

Table 1.5, Table 1.6 revised

Figure 1.1, Figure 1.2; ROM number “XXX” added, NOTE1 added

Table 4.4 “005Fh” “006Fh” “007Fh” “008Fh” added

45, 56

Figure 7.11 added

58 to 60 Table 7.5 NOTE3 added

Table 7.6, Table 7.7, Table 7.10, Table 7.12, Table 7.14 NOTE2 added

Table 7.28 NOTE2 and NOTE3 added

Table 7.29, Table 7.31 NOTE2 added

111

Figure 12.12 added

136

Figure 16.1 “TSTART”

→ “TCSTF” revised

153

Figure 16.13 added

176

Table 16.13 “00F7h” added

177

Figure 16.28 added

307

Figure 16.145 “TSTP0”

→ “CSEL0” revised

321

Figure 17.6 added

402

Table 22.2 NOTE2 revised

410, 411 Table 22.14, Table 22.15 revised

415, 419 Table 22.21, Table 22.27 revised

447

Appendix Figure 3.1 revised

R8C/2K Group, R8C/2L Group Hardware Manual

REVISION HISTORY

R8C2K Datasheet(PDF) 468 Page - Renesas Technology Corp

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