R8C2K datasheet(199/471 Pages) RENESAS

199 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 182 of 450

REJ09B0406-0110

Figure 16.35

TRCCR2 Register

Timer RC Control Register 2

Symbol

Address

After Reset

TRCCR2

0130h

00011111b

Bit Symbol

Bit Name

Function

NOTES:

TRCTRG input edge select bits(3) b7 b6

0 0 : Disable the trigger input from the

TRCTRG pin

0 1 : Rising edge selected

1 0 : Falling edge selected

1 1 : Both edges selected

b7 b6 b5 b4 b3 b2

TCEG0

b1 b0

CSEL

In timer mode and PWM mode these bits are disabled.

In timer mode and PWM mode this bit is disabled (the count operation continues independent of the CSEL bit setting).

TCEG1

For notes on PWM2 mode, refer to 16.3.9.5 TRCMR Register in PWM2 Mode.

—

(b4-b0)

Nothing is assigned. If necessary, set to 0.

When read, the content is 1.

—

TRC count operation select

bit(1, 2)

0 : Count continues at compare match w ith

the TRCGRA register

1 : Count stops at compare match w ith

the TRCGRA register

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