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H838532H Datasheet(PDF) 335 Page - Renesas Technology Corp |
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H838532H Datasheet(HTML) 335 Page - Renesas Technology Corp |
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335 / 508 page ![]() Section 10 Serial Communication Interface Rev. 1.00 May 30, 2008 Page 315 of 484 REJ09B0436-0100 (3) Interrupts and Continuous Transmission/Reception SCI3 can carry out continuous reception using RXI and continuous transmission using TXI. These interrupts are shown in table 10.10. Table 10.10 Transmit/Receive Interrupts Interrupt Flags Interrupt Request Conditions Notes RXI RDRF RIE When serial reception is performed normally and receive data is transferred from RSR to RDR, bit RDRF is set to 1, and if bit RIE is set to 1 at this time, RXI is enabled and an interrupt is requested. (See figure 10.2(a).) The RXI interrupt routine reads the receive data transferred to RDR and clears bit RDRF to 0. Continuous reception can be performed by repeating the above operations until reception of the next RSR data is completed. TXI TDRE TIE When TSR is found to be empty (on completion of the previous transmission) and the transmit data placed in TDR is transferred to TSR, bit TDRE is set to 1. If bit TIE is set to 1 at this time, TXI is enabled and an interrupt is requested. (See figure 10.2(b).) The TXI interrupt routine writes the next transmit data to TDR and clears bit TDRE to 0. Continuous transmission can be performed by repeating the above operations until the data transferred to TSR has been transmitted. TEI TEND TEIE When the last bit of the character in TSR is transmitted, if bit TDRE is set to 1, bit TEND is set to 1. If bit TEIE is set to 1 at this time, TEI is enabled and an interrupt is requested. (See figure 10.2(c).) TEI indicates that the next transmit data has not been written to TDR when the last bit of the transmit character in TSR is sent. |
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