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H838532H Datasheet(PDF) 412 Page - Renesas Technology Corp |
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H838532H Datasheet(HTML) 412 Page - Renesas Technology Corp |
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412 / 508 page ![]() Section 15 List of Registers Rev. 1.00 May 30, 2008 Page 392 of 484 REJ09B0436-0100 15.1 Register Addresses (Address Order) The data bus width indicates the numbers of bits by which the register is accessed. The number of access states indicates the number of states based on the specified reference clock. Register Name Abbre- viation Bit No Address Module Name Data Bus Width Access State Flash memory control register 1 FLMCR1 8 H'F020 ROM 8 2 Flash memory control register 2 FLMCR2 8 H'F021 ROM 8 2 Flash memory power control register FLPWCR 8 H'F022 ROM 8 2 Erase block register EBR 8 H'F023 ROM 8 2 Flash memory enable register FENR 8 H'F02B ROM 8 2 Wakeup edge select register WEGR 8 H'FF90 Interrupts 8 2 Serial port control register SPCR 8 H'FF91 SCI3 8 2 Subclock output select register CWOSR 8 H'FF92 Timer A 8 2 Event counter control/status register ECCSR 8 H'FF95 AEC* 1 8 2 Event counter H ECH 8 H'FF96 AEC* 1 8 2 Event counter L ECL 8 H'FF97 AEC* 1 8 2 Serial mode register 31 SMR31 8 H'FF98 SCI31 8 3 Bit rate register 31 BRR31 8 H'FF99 SCI31 8 3 Serial control register 31 SCR31 8 H'FF9A SCI31 8 3 Transmit data register 31 TDR31 8 H’FF9B SCI31 8 3 Serial status register 31 SSR31 8 H’FF9C SCI31 8 3 Receive data register 31 RDR31 8 H’FF9D SCI31 8 3 Serial mode register 32 SMR32 8 H'FFA8 SCI32 8 3 Bit rate register 32 BRR32 8 H'FFA9 SCI32 8 3 Serial control register 32 SCR32 8 H'FFAA SCI32 8 3 Transmit data register 32 TDR32 8 H’FFAB SCI32 8 3 Serial status register 32 SSR32 8 H’FFAC SCI32 8 3 Receive data register 32 RDR32 8 H’FFAD SCI32 8 3 Timer mode register A TMA 8 H’FFB0 Timer A 8 2 Timer counter A TCA 8 H’FFB1 Timer A 8 2 |
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