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H838532H Datasheet(PDF) 464 Page - Renesas Technology Corp |
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H838532H Datasheet(HTML) 464 Page - Renesas Technology Corp |
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464 / 508 page ![]() Appendix Rev. 1.00 May 30, 2008 Page 444 of 484 REJ09B0436-0100 Table A.3 Number of Cycles in Each Instruction Execution Status Access Location (Instruction Cycle) On-Chip Memory On-Chip Peripheral Module Instruction fetch S I 2 — Branch address read S J Stack operation S K Byte data access S L 2 or 3* Word data access S M — Internal operation S N 1 Note: * Depends on which on-chip peripheral module is accessed. See section 15.1, Register Addresses (Address Order). |
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