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H838532H Datasheet(PDF) 307 Page - Renesas Technology Corp |
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H838532H Datasheet(HTML) 307 Page - Renesas Technology Corp |
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307 / 508 page ![]() Section 10 Serial Communication Interface Rev. 1.00 May 30, 2008 Page 287 of 484 REJ09B0436-0100 10.1.2 Block Diagram Figure 10.1 shows a block diagram of SCI3. Clock TXD RXD SCK BRR SMR SCR3 SSR TDR RDR TSR RSR SPCR Transmit/receive control circuit Legend: RSR: RDR: TSR: TDR: SMR: SCR3: SSR: BRR: BRC: SPCR: Receive shift register Receive data register Transmit shift register Transmit data register Serial mode register Serial control register 3 Serial status register Bit rate register Bit rate counter Serial port control register Interrupt request (TEI, TXI, RXI, ERI) 3x Internal clock ( φ/64, φ/16, φw/2, φ) External clock BRC Baud rate generator Figure 10.1 SCI3 Block Diagram |
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