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H8S2245 Datasheet(PDF) 399 Page - Renesas Technology Corp |
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H8S2245 Datasheet(HTML) 399 Page - Renesas Technology Corp |
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399 / 818 page ![]() Section 9 16-Bit Timer Pulse Unit (TPU) Rev.3.00 Mar. 26, 2007 Page 357 of 772 REJ09B0355-0300 Contention between TGR Read and Input Capture If the input capture signal is generated in the T1 state of a TGR read cycle, the data that is read will be the data after input capture transfer. Figure 9.49 shows the timing in this case. Input capture signal Read signal Address φ TGR address TGR TGR read cycle T1 T2 M Internal data bus X M Figure 9.49 Contention between TGR Read and Input Capture |
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