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H8S2245 Datasheet(PDF) 426 Page - Renesas Technology Corp |
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H8S2245 Datasheet(HTML) 426 Page - Renesas Technology Corp |
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426 / 818 page  Section 10 8-Bit Timers Rev.3.00 Mar. 26, 2007 Page 384 of 772 REJ09B0355-0300 10.6.5 Contention between Compare Matches A and B If compare match events A and B occur at the same time, the 8-bit timer operates in accordance with the priorities for the output statuses set for compare match A and compare match B, as shown in table 10.4. Table 10.4 Timer Output Priorities Output Setting Priority Toggle output High 1 output 0 output No change Low 10.6.6 Switching of Internal Clocks and TCNT Operation TCNT may increment erroneously when the internal clock is switched over. Table 10.5 shows the relationship between the timing at which the internal clock is switched (by writing to the CKS1 and CKS0 bits) and the TCNT operation. When the TCNT clock is generated from an internal clock, the falling edge of the internal clock pulse is detected. If clock switching causes a change from high to low level, as shown in case 3 in table 10.5, a TCNT clock pulse is generated on the assumption that the switchover is a falling edge. This increments TCNT. The erroneous incrementation can also happen when switching between internal and external clocks. |
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