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H8S2245 Datasheet(PDF) 435 Page - Renesas Technology Corp

Part # H8S2245
Description  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S2245 Datasheet(HTML) 435 Page - Renesas Technology Corp

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Section 11 Watchdog Timer
Rev.3.00 Mar. 26, 2007 Page 393 of 772
REJ09B0355-0300
Bit 7—Watchdog Timer Overflow Flag (WOVF): Indicates that TCNT has overflowed
(changed from H'FF to H'00) during watchdog timer operation. This bit is not set in interval timer
mode.
Bit 7
WOVF
Description
0
[Clearing condition]
(Initial value)
Cleared by reading RSTCSR when WOVF = 1, then writing 0 to WOVF
1
[Setting condition]
Set when TCNT overflows (changes from H'FF to H'00) during watchdog timer
operation
Bit 6—Reset Enable (RSTE): Specifies whether or not a reset signal is generated in the
H8S/2245 Group if TCNT overflows during watchdog timer operation.
Bit 6
RSTE
Description
0
Reset signal is not generated if TCNT overflows*
(Initial value)
1
Reset signal is generated if TCNT overflows
Note:
*
The modules within the H8S/2245 Group are not reset, but TCNT and TCSR within the
WDT are reset.
Bit 5—Reset Select (RSTS): Selects the type of internal reset generated if TCNT overflows
during watchdog timer operation.
For details of the types of resets, see section 4, Exception Handling.
Bit 5
RSTS
Description
0
Power-on reset
(Initial value)
1
Manual reset
Bits 4 to 0—Reserved: Read-only bits, always read as 1.



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