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H8S2245 Datasheet(PDF) 641 Page - Renesas Technology Corp |
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H8S2245 Datasheet(HTML) 641 Page - Renesas Technology Corp |
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641 / 818 page ![]() Appendix A Instruction Set Rev.3.00 Mar. 26, 2007 Page 599 of 772 REJ09B0355-0300 Appendix A Instruction Set A.1 Instruction List Operand Notation Rd General register (destination)* Rs General register (source)* Rn General register* ERn General register (32-bit register) (EAd) Destination operand (EAs) Source operand EXR Extended control register CCR Condition-code register N N (negative) flag in CCR Z Z (zero) flag in CCR V V (overflow) flag in CCR C C (carry) flag in CCR PC Program counter SP Stack pointer #IMM Immediate data disp Displacement +Add – Subtract × Multiply ÷ Divide ∧ Logical AND ∨ Logical OR ⊕ Logical exclusive OR → Move ¬ Logical NOT (logical complement) ( ) < > Contents of effective address of the operand :8/:16/:24/:32 8-, 16-, 24-, or 32-bit length Note: * General registers include 8-bit registers (R0H to R7H, R0L to R7L), 16-bit registers (R0 to R7, E0 to E7), and 32-bit registers (ER0 to ER7). |
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