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H8S2245 Datasheet(PDF) 679 Page - Renesas Technology Corp

Part # H8S2245
Description  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S2245 Datasheet(HTML) 679 Page - Renesas Technology Corp

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Appendix A Instruction Set
Rev.3.00 Mar. 26, 2007 Page 637 of 772
REJ09B0355-0300
Instruction
Fetch
Branch
Address
Read
Stack
Operation
Byte Data
Access
Word Data
Access
Internal
Operation
Instruction
Mnemonic
I
J
K
L
M
N
STC
STC.B CCR,Rd
STC.B EXR,Rd
STC.W CCR,@ERd
STC.W EXR,@ERd
STC.W CCR,@(d:16,ERd)
STC.W EXR,@(d:16,ERd)
STC.W CCR,@(d:32,ERd)
STC.W EXR,@(d:32,ERd)
STC.W CCR,@–ERd
STC.W EXR,@–ERd
STC.W CCR,@aa:16
STC.W EXR,@aa:16
STC.W CCR,@aa:32
STC.W EXR,@aa:32
1
1
2
2
3
3
5
5
2
2
3
3
4
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
STM*
3
STM.L (ERn–ERn+1),@–SP
STM.L (ERn–ERn+2),@–SP
STM.L (ERn–ERn+3),@–SP
2
2
2
4
6
8
1
1
1
SUB
SUB.B Rs,Rd
SUB.W #xx:16,Rd
SUB.W Rs,Rd
SUB.L #xx:32,ERd
SUB.L ERs,ERd
1
2
1
3
1
SUBS
SUBS #1/2/4,ERd
1
SUBX
SUBX #xx:8,Rd
SUBX Rs,Rd
1
1
TAS*
4
TAS @ERd
2
2
TRAPA
TRAPA #xx:2
Normal
2
1
2/3*
1
2
Advanced
2
2
2/3*
1
2
XOR
XOR.B #xx:8,Rd
XOR.B Rs,Rd
XOR.W #xx:16,Rd
XOR.W Rs,Rd
XOR.L #xx:32,ERd
XOR.L ERs,ERd
1
1
2
1
3
2
XORC
XORC #xx:8,CCR
XORC #xx:8,EXR
1
2
Notes: 1. 2 when EXR is invalid, 3 when EXR is valid.
2. When n bytes of data are transferred.
3. Only register ER0 to ER6 should be used when using the STM/LDM instruction.
4. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.



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