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H8S2245 Datasheet(PDF) 717 Page - Renesas Technology Corp |
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H8S2245 Datasheet(HTML) 717 Page - Renesas Technology Corp |
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717 / 818 page ![]() Appendix B Register Field Rev.3.00 Mar. 26, 2007 Page 675 of 772 REJ09B0355-0300 SMR0—Serial Mode Register 0 H'FF78 Smart Card Interface 0 7 GM 0 R/W 6 CHR 0 R/W 5 PE 0 R/W 4 O/ E 0 R/W 3 STOP 0 R/W 0 CKS0 0 R/W 2 MP 0 R/W 1 CKS1 0 R/W 0 1 Normal smart card interface mode operation • TEND flag generated 12.5 etu after beginning of start bit • Clock output on/off control only GSM mode smart card interface mode operation • TEND flag generated 11.0 etu after beginning of start bit • Fixed high/low-level control possible (set in SCR) in addition to clock output on/off control GSM Mode 0 1 Setting prohibited Parity bit addition and checking enabled Parity Enable 0 1 Even parity Odd parity Parity Mode 0 1 0 1 0 1 φ clock φ/4 clock φ/16 clock φ/64 clock Clock Select 0 1 Multiprocessor function disabled Setting prohibited Multiprocessor Mode 0 1 Setting prohibited 2 stop bits Stop Bit Length 0 1 8-bit data Setting prohibited Character Length Bit Initial value Read/Write : : : Note: etu (Elementary Time Unit): Interval for transfer of one bit |
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