H8S2245 datasheet(272/818 Pages) RENESAS

272 / 818 page

Section 8 I/O Ports

Rev.3.00 Mar. 26, 2007 Page 230 of 772

REJ09B0355-0300

Port 3 Data Direction Register (P3DDR)

—

Undefined

—

Undefined

—

P35DDR

P34DDR

P33DDR

P30DDR

P32DDR

P31DDR

Bit

Initial value

R/W

P3DDR is an 8-bit write-only register, the individual bits of which specify input or output for the

pins of port 3. Bits 7 and 6 are reserved. P3DDR cannot be read; if it is, an undefined value will be

read. P3DDR cannot be modified.

Setting a P3DDR bit to 1 makes the corresponding port 3 pin an output pin, while clearing the bit

to 0 makes the pin an input pin.

This register is a write-only register, and cannot be written by bit manipulation instruction. For

details, see section 2.10.4, Access Methods for Registers with Write-Only Bits.

P3DDR is initialized to H'00 (bits 5 to 0) by a power-on reset, and in hardware standby mode. It

retains its prior state after a manual reset, and in software standby mode. As the SCI is initialized

by a reset and in standby mode, the pin states are determined by the P3DDR and P3DR

specifications.

Port 3 Data Register (P3DR)

—

Undefined

—

Undefined

—

P35DR

R/W

P34DR

R/W

P33DR

R/W

P30DR

R/W

P32DR

R/W

P31DR

R/W

Bit

Initial value

R/W

P3DR is an 8-bit readable/writable register that stores output data for the port 3 pins (P3

5 to P30).

Bits 7 and 6 are reserved; they return an undetermined value if read, and cannot be modified.

P3DR is initialized to H'00 (bits 5 to 0) by a power-on reset, and in hardware standby mode. It

retains its prior state after a manual reset, and in software standby mode.

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