HD6432351 datasheet(357/1025 Pages) RENESAS

357 / 1025 page

Section 9 I/O Ports

Rev. 3.00 Sep 15, 2006 page 323 of 988

REJ09B0330-0300

Section 9 I/O Ports

9.1

Overview

The H8S/2350 Group has 12 I/O ports (ports 1 to 3, 5, 6, and A to G), and one input-only port

(port 4).

Table 9.1 summarizes the port functions. The pins of each port also have other functions.

Each port includes a data direction register (DDR) that controls input/output (not provided for the

input-only port), a data register (DR) that stores output data, and a port register (PORT) used to

read the pin states.

Ports A to E in the H8S/2351 have a built-in pull-up MOS function, and in addition to DR and

DDR, have a MOS input pull-up control register (PCR) to control the on/off state of MOS input

pull-up.

Port 3, and port A in the H8S/2351, have an open-drain control register (ODR) that controls the

on/off state of the output buffer PMOS.

Ports A to E can drive a single TTL load and 90 pF capacitive load, and ports 1 to 3, 5, 6, F, and G

can drive a single TTL load and 30 pF capacitive load. All the I/O ports can drive a Darlington

transistor when in output mode. Ports 1, A, B, and C can drive an LED (10 mA sink current).

Port 2, and pins 64 to 67 and A4 to A7, are Schmitt-triggered inputs.

For block diagrams of the ports see appendix C, I/O Port Block Diagrams.

HD6432351 Datasheet(PDF) 357 Page - Renesas Technology Corp