HD6432351 datasheet(490/1025 Pages) RENESAS

490 / 1025 page

Section 10 16-Bit Timer Pulse Unit (TPU)

Rev. 3.00 Sep 15, 2006 page 456 of 988

REJ09B0330-0300

Example of count operation setting procedure: Figure 10.6 shows an example of the count

operation setting procedure.

Select counter clock

Operation selection

Select counter clearing source

Periodic counter

Set period

Start count operation

[1]

[2]

[4]

[3]

[5]

Free-running counter

Start count operation

<Free-running counter>

[5]

[1]

[2]

[3]

[4]

[5]

Select output compare register

Select the counter

clock with bits

TPSC2 to TPSC0 in

TCR. At the same

time, select the

input clock edge

with bits CKEG1

and CKEG0 in TCR.

For periodic counter

operation, select the

TGR to be used as

the TCNT clearing

source with bits

CCLR2 to CCLR0 in

TCR.

Designate the TGR

selected in [2] as an

output compare

TIOR.

Set the periodic

counter cycle in the

TGR selected in [2].

Set the CST bit in

TSTR to 1 to start

the counter

operation.

Figure 10.6 Example of Counter Operation Setting Procedure

Free-running count operation and periodic count operation: Immediately after a reset, the

TPU’s TCNT counters are all designated as free-running counters. When the relevant bit in TSTR

is set to 1 the corresponding TCNT counter starts up-count operation as a free-running counter.

When TCNT overflows (from H'FFFF to H'0000), the TCFV bit in TSR is set to 1. If the value of

the corresponding TCIEV bit in TIER is 1 at this point, the TPU requests an interrupt. After

overflow, TCNT starts counting up again from H'0000.

Figure 10.7 illustrates free-running counter operation.

HD6432351 Datasheet(PDF) 490 Page - Renesas Technology Corp

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