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HD6432351 Datasheet(PDF) 583 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 583 Page - Renesas Technology Corp |
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583 / 1025 page ![]() Section 13 Serial Communication Interface (SCI) Rev. 3.00 Sep 15, 2006 page 549 of 988 REJ09B0330-0300 13.1.4 Register Configuration The SCI has the internal registers shown in table 13.2. These registers are used to specify asynchronous mode or clocked synchronous mode, the data format, and the bit rate, and to control transmitter/receiver. Table 13.2 SCI Registers Channel Name Abbreviation R/W Initial Value Address* 1 0 Serial mode register 0 SMR0 R/W H'00 H'FF78 Bit rate register 0 BRR0 R/W H'FF H'FF79 Serial control register 0 SCR0 R/W H'00 H'FF7A Transmit data register 0 TDR0 R/W H'FF H'FF7B Serial status register 0 SSR0 R/(W)* 2 H'84 H'FF7C Receive data register 0 RDR0 R H'00 H'FF7D Smart card mode register 0 SCMR0 R/W H'F2 H'FF7E 1 Serial mode register 1 SMR1 R/W H'00 H'FF80 Bit rate register 1 BRR1 R/W H'FF H'FF81 Serial control register 1 SCR1 R/W H'00 H'FF82 Transmit data register 1 TDR1 R/W H'FF H'FF83 Serial status register 1 SSR1 R/(W)* 2 H'84 H'FF84 Receive data register 1 RDR1 R H'00 H'FF85 Smart card mode register 1 SCMR1 R/W H'F2 H'FF86 All Module stop control register MSTPCR R/W H'3FFF H'FF3C Notes: 1. Lower 16 bits of the address. 2. Can only be written with 0 for flag clearing. |
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