Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

HD6432351 Datasheet(PDF) 673 Page - Renesas Technology Corp

Part # HD6432351
Description  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 Datasheet(HTML) 673 Page - Renesas Technology Corp

Back Button HD6432351 Datasheet HTML 669Page - Renesas Technology Corp HD6432351 Datasheet HTML 670Page - Renesas Technology Corp HD6432351 Datasheet HTML 671Page - Renesas Technology Corp HD6432351 Datasheet HTML 672Page - Renesas Technology Corp HD6432351 Datasheet HTML 673Page - Renesas Technology Corp HD6432351 Datasheet HTML 674Page - Renesas Technology Corp HD6432351 Datasheet HTML 675Page - Renesas Technology Corp HD6432351 Datasheet HTML 676Page - Renesas Technology Corp HD6432351 Datasheet HTML 677Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 673 / 1025 page
background image
Section 14 Smart Card Interface
Rev. 3.00 Sep 15, 2006 page 639 of 988
REJ09B0330-0300
Retransfer Operations
Retransfer operations are performed by the SCI in receive mode and transmit mode as described
below.
Retransfer operation when SCI is in receive mode: Figure 14.11 illustrates the retransfer
operation when the SCI is in receive mode.
[1] If an error is found when the received parity bit is checked, the PER bit in SSR is
automatically set to 1. If the RIE bit in SCR is enabled at this time, an ERI interrupt request is
generated. The PER bit in SSR should be kept cleared to 0 until the next parity bit is sampled.
[2] The RDRF bit in SSR is not set for a frame in which an error has occurred.
[3] If no error is found when the received parity bit is checked, the PER bit in SSR is not set to 1.
[4] If no error is found when the received parity bit is checked, the receive operation is judged to
have been completed normally, and the RDRF flag in SSR is automatically set to 1. If the RIE
bit in SCR is enabled at this time, an RXI interrupt request is generated.
If DMAC or DTC data transfer by an RXI source is enabled, the contents of RDR can be read
automatically. When the RDR data is read by the DMAC or DTC, the RDRF flag is
automatically cleared to 0.
[5] When a normal frame is received, the pin retains the high-impedance state at the timing for
error signal transmission.
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
(DE)
Ds D0 D1 D2 D3 D4
Ds
Transfer
frame n+1
Retransferred frame
nth transfer frame
RDRF
[1]
PER
[2]
[3]
[4]
Figure 14.11 Retransfer Operation in SCI Receive Mode



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com