HD6432351 datasheet(812/1025 Pages) RENESAS

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Appendix A Instruction Set

Rev. 3.00 Sep 15, 2006 page 778 of 988

REJ09B0330-0300

Table A.5

Number of Cycles in Instruction Execution

Instruction

Fetch

Mnemonic

Instruction

ADD

ADDS

ADDX

AND

ANDC

BAND

Bcc

ADD.B #xx:8,Rd

ADD.B Rs,Rd

ADD.W #xx:16,Rd

ADD.W Rs,Rd

ADD.L #xx:32,ERd

ADD.L ERs,ERd

ADDS #1/2/4,ERd

ADDX #xx:8,Rd

ADDX Rs,Rd

AND.B #xx:8,Rd

AND.B Rs,Rd

AND.W #xx:16,Rd

AND.W Rs,Rd

AND.L #xx:32,ERd

AND.L ERs,ERd

ANDC #xx:8,CCR

ANDC #xx:8,EXR

BAND #xx:3,Rd

BAND #xx:3,@ERd

BAND #xx:3,@aa:8

BAND #xx:3,@aa:16

BAND #xx:3,@aa:32

BRA d:8

(BT d:8)

BRN d:8

(BF d:8)

BHI d:8

BLS d:8

BCC d:8

(BHS d:8)

BCS d:8

(BLO d:8)

BNE d:8

BEQ d:8

BVC d:8

BVS d:8

BPL d:8

BMI d:8

BGE d:8

BLT d:8

BGT d:8

BLE d:8

BRA d:16

(BT d:16)

BRN d:16

(BF d:16)

Branch

Address

Read

Stack

Operation

Byte Data

Access

Word Data

Access

Internal

Operation

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