| Electronic Components Datasheet Search |
|
HD64F2149YV Datasheet(PDF) 447 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64F2149YV Datasheet(HTML) 447 Page - Renesas Technology Corp |
|
447 / 1075 page ![]() Section 14 Watchdog Timer (WDT) Rev. 3.00 Jan 18, 2006 page 419 of 1044 REJ09B0280-0300 TCNT value H'00 Time H'FF WT/ IT = 1 TME = 1 H'00 written to TCNT WT/ IT = 1 TME = 1 H'00 written to TCNT 518 system clock periods Internal reset signal Overflow RESO and internal reset generated OVF = 1* RESO signal WT/ IT: Timer mode select bit TME: Timer enable bit OVF: Overflow flag Note: * Cleared to 0 by an internal reset when OVF is set to 1. XRST is cleared to 0. 132 system clock periods Figure 14.3 Operation in Watchdog Timer Mode (RST/ NMI NMI NMI NMI = 1) 14.3.2 Interval Timer Operation To use the WDT as an interval timer, clear the WT/ IT bit in TCSR to 0 and set the TME bit to 1. An interval timer interrupt (WOVI) is generated each time TCNT overflows, provided that the WDT is operating as an interval timer, as shown in figure 14.4. This function can be used to generate interrupt requests at regular intervals. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |