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HD64F2149YV Datasheet(PDF) 455 Page - Renesas Technology Corp |
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HD64F2149YV Datasheet(HTML) 455 Page - Renesas Technology Corp |
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455 / 1075 page  Section 15 Serial Communication Interface (SCI, IrDA) Rev. 3.00 Jan 18, 2006 page 427 of 1044 REJ09B0280-0300 15.1.2 Block Diagram Figure 15.1 shows a block diagram of the SCI. TDR RSR RDR Module data bus TSR SSR SCMR SCR SMR Transmission/ reception control BRR Baud rate generator Internal data bus RxD TxD SCK Parity generation Parity check Clock External clock φ φ/4 φ/16 φ/64 TXI TEI RXI ERI Legend: RSR: Receive shift register RDR: Receive data register TSR: Transmit shift register TDR: Transmit data register SMR: Serial mode register SCR: Serial control register SSR: Serial status register SCMR: Serial interface mode register BRR: Bit rate register Figure 15.1 Block Diagram of SCI |
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