HD64F2149YV datasheet(623/1075 Pages) RENESAS

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Section 18A Host Interface X-Bus Interface (XBS)

Rev. 3.00 Jan 18, 2006 page 595 of 1044

REJ09B0280-0300

18A.3.2 Control States

Table 18A.5 shows host interface operations from the HIF host, and slave operation.

Table 18A.5 Host Interface Operations from HIF Host, and Slave Operation

Other than

CSn

IOR

IOW

HA0

Operation

000

0Setting prohibited

Setting prohibited

Data read from output data register n (ODRn)

Status read from status register n (STRn)

Data written to input data register n (IDRn)

Command written to input data register n (IDRn)

Idle state

(n = 1 to 4)

18A.3.3 A20 Gate

The A20 gate signal can mask address A20 to emulate an addressing mode used by personal

computers with an 8086*-family CPU. A regular-speed A20 gate signal can be output under

firmware control. Fast A20 gate output is enabled by setting the FGA20E bit (bit 0) to 1 in HICR

(H'FFF0).

Note: *

Intel microprocessor.

Regular A20 Gate Operation: Output of the A20 gate signal can be controlled by an H'D1

command followed by data. When the slave processor receives data, it normally uses an interrupt

routine activated by the IBF1 interrupt to read IDR1. If the data follows an H'D1 command,

software copies bit 1 of the data and outputs it at the gate A20 pin.

Fast A20 Gate Operation: When the FGA20E bit is set to 1, P81/GA20 is used for output of a

fast A20 gate signal. Bit P81DDR must be set to 1 to assign this pin for output. When the DDR bit

for P81 is set to 1, the state of the P81/GA20 pin cannot be monitored by reading the DR bit for

P81. The state of the P81/GA20 pin can be monitored by reading the GA20 bit in the HIF:LPC’s

HICR2 register. The initial output from this pin will be a logic 1, which is the initial value.

Afterward, the host processor can manipulate the output from this pin by sending commands and

data. This function is available only when register IDR1 is accessed using

CS1. The slave

processor decodes the commands input from the host processor. When an H'D1 host command is

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