HD64F2149YV datasheet(223/1075 Pages) RENESAS

223 / 1075 page

Section 7 Data Transfer Controller

Rev. 3.00 Jan 18, 2006 page 195 of 1044

REJ09B0280-0300

Software Activation: An example is shown in which the DTC is used to transfer a block of 128

bytes of data by means of software activation. The transfer source address is H'1000 and the

destination address is H'2000. The vector number is H'60, so the vector address is H'04C0.

1. Set MRA to incrementing source address (SM1 = 1, SM0 = 0), incrementing destination

address (DM1 = 1, DM0 = 0), block transfer mode (MD1 = 1, MD0 = 0), and byte size (Sz =

0). The DTS bit can have any value. Set MRB for one block transfer by one interrupt (CHNE =

0). Set the transfer source address (H'1000) in SAR, the destination address (H'2000) in DAR,

and 128 (H'8080) in CRA. Set 1 (H'0001) in CRB.

2. Set the start address of the register information at the DTC vector address (H'04C0).

3. Check that the SWDTE bit in DTVECR is 0. Check that there is currently no transfer activated

by software.

4. Write 1 to the SWDTE bit and the vector number (H'60) to DTVECR. The write data is H'E0.

5. Read DTVECR again and check that it is set to the vector number (H'60). If it is not, this

indicates that the write failed. This is presumably because an interrupt occurred between steps

3 and 4 and led to a different software activation. To activate this transfer, go back to step 3.

6. If the write was successful, the DTC is activated and a block of 128 bytes of data is transferred.

7. After the transfer, an SWDTEND interrupt occurs. The interrupt handling routine should clear

the SWDTE bit to 0 and perform other wrap-up processing.

HD64F2149YV Datasheet(PDF) 223 Page - Renesas Technology Corp