| Electronic Components Datasheet Search |
|
M16C/26 Datasheet(PDF) 123 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
M16C/26 Datasheet(HTML) 123 Page - Renesas Technology Corp |
|
123 / 239 page ![]() Renesas Technology Corp. Serial I/O 117 M16C/26 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Under development Preliminary Specifications Rev. 0.9 Specifications in this manual are tentative and subject to change. Figure 1.15.9. Serial I/O-related registers (6) UART2 special mode register 2 Symbol Address When reset U2SMR2 0376 16 X00000002 b7 b6 b5 b4 b3 b2 b1 b0 Bit name Bit symbol W R Function STAC SWC2 SDHI I C mode select bit 2 SCL wait output bit 0 : Disabled 1 : Enabled SDA output stop bit UARTi initialization bit Clock-synchronous bit Refer to Table 1.15.14 0 : Disabled 1 : Enabled IICM2 CSC SWC ALS 0 : Disabled 1 : Enabled SDA output disable bit SCL wait output bit 2 0: Enabled 1: Disabled (high impedance) 0 : Disabled 1 : Enabled 0: UART2 clock 1: 0 output 2 UART2 special mode register 3 Symbol Address When reset U2SMR3 0375 16 000X0X0X2 b7 b6 b5 b4 b3 b2 b1 b0 Bit name Bit symbol W R Function DL2 SDAi (TXDi) digital delay setup bit (Note 1, Note 2) DL0 DL1 0 0 0 : Without delay 0 0 1 : 1 to 2 cycle(s) of BRG count source 0 1 0 : 2 to 3 cycles of BRG count source 0 1 1 : 3 to 4 cycles of BRG count source 1 0 0 : 4 to 5 cycles of BRG count source 1 0 1 : 5 to 6 cycles of BRG count source 1 1 0 : 6 to 7 cycles of BRG count source 1 1 1 : 7 to 8 cycles of BRG count source Nothing is assigned. In an attempt to write to these bits, write 0 . The value, if read, turns out to be indeterminate. b7 b6 b5 Nothing is assigned. In an attempt to write to these bits, write 0 . The value, if read, turns out to be indeterminate. 0 : Without clock delay 1 : With clock delay Clock phase set bit Nothing is assigned. In an attempt to write to these bits, write 0 . The value, if read, turns out to be indeterminate. 0 : CLKi is CMOS output 1 : CLKi is N-channel open drain output Clock output select bit Nothing is assigned. In an attempt to write to these bits, write 0 . The value, if read, turns out to be indeterminate. CKPH NODC Note 1 : These bits are used for SDAi (TxDi)output digital delay when using UARTi for I2C interface. Otherwise,must set to 0002 . Note 2 : The amount of delay varies with the load on SCL and SDA pins. Also, when using an external clock, the amount of delay increases by about 100 ns, so be sure to take this into account when using the device. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |