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M16C/62 Datasheet(PDF) 582 Page - Renesas Technology Corp

Part # M16C/62
Description  16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
PDF  621 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M16C/62 Datasheet(HTML) 582 Page - Renesas Technology Corp

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Appendix 1
Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
567
Appendix 1 Check Sheet
The following check sheet was created based on items which had been the source of problems in the past.
We recommend you refer to the check sheet when troubleshooting.
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Checks regarding register initial settings
Has the initial setting been made in the interrupt stack pointer (ISP) at the top of the program?
Has the initial setting been made in the user stack pointer (USP)? (Only if using the USP)
Does the USP overlap the ISP area? (Only if using the USP)
Is interrupt enabled after setting the ISP and USP?
Is the top address of the variable interrupt vector table set in the interrupt table register (INTB)?
Is interrupt enabled after setting the INTB?
Has the initial setting been made in the frame base register (FB)? (Only if using the FB)
Has the initial setting been made in the stack base register (SB)? (Only if using the SB)
Checks regarding the internal memory
Does the RAM capacity used in the program exceed the RAM capacity of the microcomputer?
Does the ROM capacity used in the program exceed the ROM capacity of the microcomputer?
Checks regarding the protect register
Is writing enabled in the protect register (address 000A16) before writing in the system clock control
register (addresses 000616 and 000716)?
Is writing enabled in the protect register before writing in the processor mode register (addresses
000416 and 000516)?
Is writing enabled in the protect register before writing in the port P9 direction register (address
03F316)?
Is writing effectuated in the port P9 direction register by the next instruction after writing is enabled in
the protect register?
Does not an interrupt generate between the instruction writing is enabled in the protect register and
the instruction writing in the port P9 direction register?



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