M16CSLASH62 datasheet(296/621 Pages) RENESAS

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Timer A

Mitsubishi microcomputers

M16C / 62 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

281

(2) Count source

The internal count source can be selected from f1, f8, f32, and fC32. Clocks f1, f8, and f32 are derived

by dividing the CPU's main clock by 1, 8, and 32 respectively. Clock fC32 is derived by dividing the

CPU's secondary clock by 32.

(3) Frequency division ratio

In timer mode or pulse width modulation mode, [the value set in the timer register + 1] becomes the

frequency division ratio. In event counter mode, [the set value + 1] becomes the frequency division

ratio when a down count is performed, or [FFFF16 - the set value + 1] becomes the frequency division

ratio when an up count is performed. In one-shot timer mode, the value set in the timer register be-

comes the frequency division ratio.

The counter overflows (or underflows) when a count source equal to a frequency division ratio is input,

and an interrupt occurs. For the pulse output function, the output from the port varies (the value in the

port register does not vary).

(4) Reading the timer

Either in timer mode or in event counter mode, reading the timer register takes out the count at that

moment. Read it in 16-bit units. The data either in one-shot timer mode or in pulse width modulation

mode is indeterminate.

(5) Writing to the timer

To write to the timer register when a count is in progress, the value is written only to the reload register.

When writing to the timer register when a count is stopped, the value is written both to the reload

(6) Relation between the input/output to/from the timer and the direction register

With the output function of the timer, pulses are output regardless of the direction register of the

relevant port. To input an external signal to the timer, set the direction register of the relevant port to

input.

(7) Pins related to timer A

(a) TA0IN, TA1IN, TA2IN, TA3IN, TA4IN

Input pins to timer A.

(b) TA0OUT, TA1OUT, TA2OUT, TA3OUT, TA4OUT

Output pins from timer A. They become input pins to

timer A when event counter mode is active.

(8) Registers related to timer A

Figure 2.2.1 shows the memory map of timer A-related registers. Figures 2.2.2 through 2.2.5 show

timer A-related registers.

M16C/62 Datasheet(PDF) 296 Page - Renesas Technology Corp