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M16C/62 Datasheet(PDF) 307 Page - Renesas Technology Corp

Part # M16C/62
Description  16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
PDF  621 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M16C/62 Datasheet(HTML) 307 Page - Renesas Technology Corp

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Timer A
Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
292
Figure 2.2.12. Operation timing of event counter mode, reload type selected
2.2.5 Operation of Timer A (event counter mode, reload type selected)
In event counter mode, choose functions from those listed in Table 2.2.4. Operations of the circled items
are described below. Figure 2.2.12 shows the operation timing, and Figure 2.2.13 shows the set-up
procedure.
Note: j = i – 1, but j = 4 when i = 0.
(1) Setting the count start flag to “1” causes the counter to count the falling edges of the count
source.
(2) If an underflow occurs, the content of the reload register is reloaded, and the count continues.
At this time, the timer Ai interrupt request bit goes to “1”.
(3) If switching from an up count to a down count or vice versa while a count is in progress, the
switch takes effect from the next effective edge of the count source.
(4) Setting the count start flag to “0” causes the counter to hold its value and to stop.
(5) If an overflow occurs, the content of the reload register is reloaded, and the count continues.
At this time, the timer Ai interrupt request bit goes to “1”.
Operation
Table 2.2.4. Choosed functions
Item
Item
Set-up
Set-up
Count source
Input signal to TAiIN
(counting falling edges)
Input signal to TAiIN
(counting rising edges)
Timer overflow
(TB2/TAj overflow)
Count operation type
Reload type
Free-run type
Factor for switching
between up and
down
Content of up/down flag
Input signal to TAiOUT
Pulse output function
No pulses output
Pulses output
O
O
O
O
FFFF16
n
000016
Time
n = reload register content
(1) Start count
Count start flag
“1”
Set to “1” by software
“0”
Timer Ai interrupt
request bit
“1”
“0”
Up/down flag
“1”
“0”
Set to “1” by software
Set to “1” by software
(5) Overflow
Cleared to “0” when interrupt request is accepted, or cleared by software
Start count again
(2) Underflow
(3) Switch count
Cleared to “0” by
software
(4) Stop count



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