PIC18F2420-ESLASHP datasheet(232/412 Pages) MICROCHIP

232 / 412 page

PIC18F2420/2520/4420/4520

DS39631E-page 230

19.4

Operation in Power-Managed

Modes

The selection of the automatic acquisition time and A/D

conversion clock is determined in part by the clock

source and frequency while in a power-managed mode.

If the A/D is expected to operate while the device is in

a power-managed mode, the ACQT<2:0> and

ADCS<2:0> bits in ADCON2 should be updated in

accordance with the clock source to be used in that

mode. After entering the mode, an A/D acquisition or

conversion may be started. Once started, the device

should continue to be clocked by the same clock

source until the conversion has been completed.

If desired, the device may be placed into the

corresponding Idle mode during the conversion. If the

device clock frequency is less than 1 MHz, the A/D RC

clock source should be selected.

Operation in Sleep mode requires the A/D FRC clock to

be selected. If the ACQT<2:0> bits are set to ‘000’ and

a conversion is started, the conversion will be delayed

one instruction cycle to allow execution of the SLEEP

instruction and entry to Sleep mode. The IDLEN bit

(OSCCON<7>) must have already been cleared prior

to starting the conversion.

19.5

Configuring Analog Port Pins

The ADCON1, TRISA, TRISB and TRISE registers all

configure the A/D port pins. The port pins needed as

analog inputs must have their corresponding TRIS bits

set (input). If the TRIS bit is cleared (output), the digital

output level (VOH or VOL) will be converted.

The A/D operation is independent of the state of the

CHS<3:0> bits and the TRIS bits.

Note 1:

When reading the PORT register, all pins

configured as analog input channels will

read as cleared (a low level). Pins con-

figured as digital inputs will convert as

analog inputs. Analog levels on a digitally

configured input will be accurately

converted.

Analog levels on any pin defined as a dig-

ital input may cause the digital input buffer

to consume current out of the device’s

specification limits.

The PBADEN bit, in Configuration

reset as analog or digital pins by control-

ling how the PCFG bits in ADCON1 are

reset.

PIC18F2420-E/P Datasheet(PDF) 232 Page - Microchip Technology

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