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PIC18F2420-E/P Datasheet(PDF) 405 Page - Microchip Technology |
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PIC18F2420-E/P Datasheet(HTML) 405 Page - Microchip Technology |
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405 / 412 page  DS39631E-page 403 © 2008 Microchip Technology Inc. PIC18F2420/2520/4420/4520 PWM (CCP Module) Associated Registers ................................................146 Auto-Shutdown (CCP1 Only) ....................................145 Duty Cycle.................................................................144 Example Frequencies/Resolutions............................145 Period........................................................................144 Setup for PWM Operation .........................................145 TMR2 to PR2 Match..................................................144 PWM (ECCP Module) .......................................................149 CCPR1H:CCPR1L Registers ....................................149 Direction Change in Full-Bridge Output Mode .....................................................154 Duty Cycle.................................................................150 Effects of a Reset......................................................159 Enhanced PWM Auto-Shutdown...............................156 Example Frequencies/Resolutions............................150 Full-Bridge Mode.......................................................153 Full-Bridge Output Mode Application Example .........154 Half-Bridge Mode ......................................................152 Half-Bridge Output Mode Applications Example .......152 Operation in Power-Managed Modes .......................159 Operation with Fail-Safe Clock Monitor.....................159 Output Configurations ...............................................150 Output Relationships (Active-High) ...........................151 Output Relationships (Active-Low)............................151 Period........................................................................149 Programmable Dead-Band Delay .............................156 Setup for PWM Operation .........................................159 Start-up Considerations ............................................158 TMR2 to PR2 Match..................................................149 Q Q Clock......................................................................145, 150 R RAM. See Data Memory. RBIF Bit .............................................................................108 RC Oscillator .......................................................................25 RCIO Oscillator Mode .................................................25 RC_IDLE Mode ...................................................................39 RC_RUN Mode ...................................................................35 RCALL...............................................................................297 RCON Register Bit Status During Initialization .....................................48 Reader Response .............................................................408 Register File ........................................................................62 Register File Summary..................................................64–66 Registers ADCON0 (A/D Control 0) ..........................................223 ADCON1 (A/D Control 1) ..........................................224 ADCON2 (A/D Control 2) ..........................................225 BAUDCON (Baud Rate Control) ...............................204 CCP1CON (ECCP Control, 40/44-Pin Devices)............................................147 CCPxCON (CCPx Control, 28-Pin Devices) .............139 CMCON (Comparator Control)..................................233 CONFIG1H (Configuration 1 High) ...........................250 CONFIG2H (Configuration 2 High) ...........................252 CONFIG2L (Configuration 2 Low).............................251 CONFIG3H (Configuration 3 High) ...........................253 CONFIG4L (Configuration 4 Low).............................253 CONFIG5H (Configuration 5 High) ...........................254 CONFIG5L (Configuration 5 Low).............................254 CONFIG6H (Configuration 6 High) ...........................255 CONFIG6L (Configuration 6 Low).............................255 CONFIG7H (Configuration 7 High) ...........................256 CONFIG7L (Configuration 7 Low) ............................ 256 CVRCON (Comparator Voltage Reference Control) ........................................... 239 DEVID1 (Device ID 1) ............................................... 257 DEVID2 (Device ID 2) ............................................... 257 ECCP1AS (ECCP Auto-Shutdown Control) ............. 157 EECON1 (EEPROM Control 1) ............................ 75, 84 HLVDCON (High/Low-Voltage Detect Control) ........ 243 INTCON (Interrupt Control)......................................... 93 INTCON2 (Interrupt Control 2).................................... 94 INTCON3 (Interrupt Control 3).................................... 95 IPR1 (Peripheral Interrupt Priority 1) ........................ 100 IPR2 (Peripheral Interrupt Priority 2) ........................ 101 OSCCON (Oscillator Control) ..................................... 30 OSCTUNE (Oscillator Tuning) .................................... 27 PIE1 (Peripheral Interrupt Enable 1)........................... 98 PIE2 (Peripheral Interrupt Enable 2)........................... 99 PIR1 (Peripheral Interrupt Request (Flag) 1).............. 96 PIR2 (Peripheral Interrupt Request (Flag) 2).............. 97 PWM1CON (PWM Dead-Band Delay) ..................... 156 RCON (Reset Control)........................................ 42, 102 RCSTA (Receive Status and Control) ...................... 203 SSPCON1 (MSSP Control 1, I2C Mode) .................. 172 SSPCON1 (MSSP Control 1, SPI Mode).................. 163 SSPCON2 (MSSP Control 2, I2C Mode) .................. 173 SSPSTAT (MSSP Status, I2C Mode) ....................... 171 SSPSTAT (MSSP Status, SPI Mode)....................... 162 STATUS...................................................................... 67 STKPTR (Stack Pointer)............................................. 55 T0CON (Timer0 Control) .......................................... 123 T1CON (Timer1 Control) .......................................... 127 T2CON (Timer2 Control) .......................................... 133 T3CON (Timer3 Control) .......................................... 135 TRISE (PORTE/PSP Control)................................... 118 TXSTA (Transmit Status and Control) ...................... 202 WDTCON (Watchdog Timer Control) ....................... 259 RESET .............................................................................. 297 Reset State of Registers ..................................................... 48 Resets......................................................................... 41, 249 Brown-out Reset (BOR)............................................ 249 Oscillator Start-up Timer (OST) ................................ 249 Power-on Reset (POR)............................................. 249 Power-up Timer (PWRT) .......................................... 249 RETFIE ............................................................................. 298 RETLW ............................................................................. 298 RETURN ........................................................................... 299 Return Address Stack ......................................................... 54 Return Stack Pointer (STKPTR) ......................................... 55 Revision History ................................................................ 395 RLCF................................................................................. 299 RLNCF .............................................................................. 300 RRCF ................................................................................ 300 RRNCF ............................................................................. 301 S SCK................................................................................... 161 SDI .................................................................................... 161 SDO .................................................................................. 161 SEC_IDLE Mode................................................................. 38 SEC_RUN Mode................................................................. 34 Serial Clock, SCK ............................................................. 161 Serial Data In (SDI)........................................................... 161 Serial Data Out (SDO) ...................................................... 161 Serial Peripheral Interface. See SPI Mode. SETF................................................................................. 301 Slave Select (SS).............................................................. 161 |
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