PIC18F44J10-ISLASHSOSQTP datasheet(240/368 Pages) MICROCHIP

240 / 368 page

PIC18F45J10 FAMILY

DS39682E-page 238

CONFIG2L: CONFIGURATION REGISTER 2 LOW (BYTE ADDRESS 300002h)

R/WO-1

U-0

R/WO-1

IESO

FCMEN

—

FOSC2

FOSC1

FOSC0

bit 7

bit 0

Legend:

R = Readable bit

WO = Write Once bit

U = Unimplemented bit, read as ‘0’

-n = Value when device is unprogrammed

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

IESO:

Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit

= Two-Speed Start-up enabled

= Two-Speed Start-up disabled

bit 6

FCMEN:

Fail-Safe Clock Monitor Enable bit

= Fail-Safe Clock Monitor enabled

= Fail-Safe Clock Monitor disabled

bit 5-3

Unimplemented:

Read as ‘0’

bit 2

FOSC2:

Default/Reset System Clock Select bit

= Clock selected by FOSC<1:0> as system clock is enabled when OSCCON<1:0> = 00

= INTRC enabled as system clock when OSCCON<1:0> = 00

bit 1-0

FOSC<1:0>:

Oscillator Selection bits

= EC oscillator, PLL enabled and under software control, CLKO function on OSC2

= EC oscillator, CLKO function on OSC2

= HS oscillator, PLL enabled and under software control

= HS oscillator

PIC18F44J10-I/SOSQTP Datasheet(PDF) 240 Page - Microchip Technology

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