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56F8167 Datasheet(PDF) 137 Page - Freescale Semiconductor, Inc |
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56F8167 Datasheet(HTML) 137 Page - Freescale Semiconductor, Inc |
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137 / 182 page  56F8367 Information 56F8367 Technical Data, Rev. 9 Freescale Semiconductor 137 Preliminary Part 9 Joint Test Action Group (JTAG) 9.1 56F8367 Information Please contact your Freescale marketing representative or authorized distributor for device/package-specific BSDL information. GPIOF 0Peripheral D7 28 1Peripheral D8 29 2Peripheral D9 30 3 Peripheral D10 32 4 Peripheral D11 149 5 Peripheral D12 150 6 Peripheral D13 151 7 Peripheral D14 152 8 Peripheral D15 153 9Peripheral D0 70 10 Peripheral D1 71 11 Peripheral D2 83 12 Peripheral D3 86 13 Peripheral D4 88 14 Peripheral D5 89 15 Peripheral D6 90 1. See Part 6.5.8 to determine how to select peripherals from this set Table 8-3 GPIO External Signals Map (Continued) Pins in italics are NOT available in the 56F8167 device GPIO Port GPIO Bit Reset Function Functional Signal Package Pin |
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