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ATmega16HVB Datasheet(PDF) 154 Page - ATMEL Corporation |
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ATmega16HVB Datasheet(HTML) 154 Page - ATMEL Corporation |
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154 / 273 page ![]() 154 8042A–AVR–07/09 ATmega16HVB/32HVB 26. Cell Balancing 26.1 Overview ATmega16HVB/32HVB incorporates cell balancing FETs. The chip provides one cell balancing FET for each battery cell in series. The FETs are directly controlled by the application software, allowing the cell balancing algorithms to be implemented in software. The FETs are connected in parallel with the individual battery cells. The cell balancing is illustrated in Figure 26-1. The fig- ure shows a four-cell configuration. The cell balancing FETs are disabled in the Power-off mode. For typical current through the Cell Balancing FETs, see ”Electrical Characteristics” on page 228. The Cell Balancing FETs are controlled by the CBCR. Neighbouring FETs cannot be simultane- ously enabled. If trying to enable two neighbouring FETs, both will be disabled. Figure 26-1. Cell Balancing Cell Balancing Control Register T CB RP RP RP RP T CB T CB T CB Level Shift Level Shift Level Shift Level Shift PV1 NV PV2 PV3 PV4 RP |
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