PIC12F1822-ISLASHMF datasheet(391/398 Pages) MICROCHIP

391 / 398 page

 2010 Microchip Technology Inc.

Preliminary

DS41413A-page 391

PIC12F/LF1822/16F/LF1823

Synchronous Master Mode ............................... 300, 304

Associated Registers

Receive..................................................... 303

Transmit.................................................... 301

Reception.......................................................... 302

Transmission .................................................... 300

Synchronous Slave Mode

Associated Registers

Receive..................................................... 305

Transmit.................................................... 304

Reception.......................................................... 305

Transmission .................................................... 304

Extended Instruction Set

ADDFSR ................................................................... 323

Fail-Safe Clock Monitor....................................................... 66

Fail-Safe Condition Clearing ....................................... 66

Fail-Safe Detection ..................................................... 66

Fail-Safe Operation..................................................... 66

Reset or Wake-up from Sleep..................................... 66

Firmware Instructions........................................................ 319

Fixed Voltage Reference (FVR)........................................ 131

Associated Registers ................................................ 132

Flash Program Memory .................................................... 103

Erasing...................................................................... 108

Modifying................................................................... 112

Writing....................................................................... 108

FSR Register .......... 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41

FVRCON (Fixed Voltage Reference Control) Register ..... 132

I2C Mode (MSSPx)

Acknowledge Sequence Timing................................ 265

Bus Collision

During a Repeated Start Condition................... 270

During a Stop Condition.................................... 271

Effects of a Reset...................................................... 266

I2C Clock Rate w/BRG.............................................. 273

Master Mode

Operation .......................................................... 257

Reception.......................................................... 263

Start Condition Timing .............................. 259, 260

Transmission .................................................... 261

Multi-Master Communication, Bus Collision

and Arbitration .................................................. 266

Multi-Master Mode .................................................... 266

Read/Write Bit Information (R/W Bit) ........................ 242

Slave Mode

Transmission .................................................... 247

Sleep Operation ........................................................ 266

Stop Condition Timing............................................... 265

INDF Register ......... 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41

Indirect Addressing ............................................................. 45

Instruction Format ............................................................. 320

Instruction Set ................................................................... 319

ADDLW ..................................................................... 323

ADDWF..................................................................... 323

ADDWFC .................................................................. 323

ANDLW ..................................................................... 323

ANDWF..................................................................... 323

BRA........................................................................... 324

CALL ......................................................................... 325

CALLW...................................................................... 325

LSLF ......................................................................... 327

LSRF......................................................................... 327

MOVF ....................................................................... 327

MOVIW ..................................................................... 328

MOVLB ..................................................................... 328

MOVWI ..................................................................... 329

OPTION.................................................................... 329

RESET...................................................................... 329

SUBWFB .................................................................. 331

TRIS ......................................................................... 332

BCF .......................................................................... 324

BSF........................................................................... 324

BTFSC...................................................................... 324

BTFSS ...................................................................... 324

CALL......................................................................... 325

CLRF ........................................................................ 325

CLRW ....................................................................... 325

CLRWDT .................................................................. 325

COMF ....................................................................... 325

DECF........................................................................ 325

DECFSZ ................................................................... 326

GOTO ....................................................................... 326

INCF ......................................................................... 326

INCFSZ..................................................................... 326

IORLW...................................................................... 326

IORWF...................................................................... 326

MOVLW .................................................................... 328

MOVWF.................................................................... 328

NOP.......................................................................... 329

RETFIE..................................................................... 330

RETLW ..................................................................... 330

RETURN................................................................... 330

RLF........................................................................... 330

RRF .......................................................................... 331

SLEEP ...................................................................... 331

SUBLW..................................................................... 331

SUBWF..................................................................... 331

SWAPF..................................................................... 332

XORLW .................................................................... 332

XORWF .................................................................... 332

INTCON Register................................................................ 89

Internal Oscillator Block

INTOSC

Specifications ................................................... 349

Internal Sampling Switch (RSS) Impedance ..................... 143

Internet Address ............................................................... 395

Interrupt-On-Change......................................................... 127

Associated Registers................................................ 129

Interrupts ............................................................................ 83

ADC .......................................................................... 138

Associated registers w/ Interrupts .............................. 94

Configuration Word w/ Clock Sources........................ 70

Configuration Word w/ Reference Clock Sources ...... 73

TMR1........................................................................ 176

INTOSC Specifications ..................................................... 349

IOCAF Register ................................................................ 128

IOCAN Register ................................................................ 128

IOCAP Register ................................................................ 128

LATA Register .......................................................... 122, 125

Load Conditions................................................................ 347

LSLF ................................................................................. 327

LSRF ................................................................................ 327

Master Synchronous Serial Port. See MSSPx

MCLR ................................................................................. 78

PIC12F1822-I/MF Datasheet(PDF) 391 Page - Microchip Technology

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