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PIC18F23K20-E/ML Datasheet(PDF) 280 Page - Microchip Technology

Part # PIC18F23K20-E/ML
Description  28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
PDF  456 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F23K20-E/ML Datasheet(HTML) 280 Page - Microchip Technology

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PIC18F2XK20/4XK20
DS41303G-page 280
 2010 Microchip Technology Inc.
FIGURE 20-2:
COMPARATOR C1 SIMPLIFIED BLOCK DIAGRAM
FIGURE 20-3:
COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM
Note
1:
When C1ON = 0, the C1 comparator will produce a ‘0’ output to the XOR Gate.
2:
Output shown for reference only. See I/O port pin block diagram for more detail.
3:
Q1 and Q3 are phases of the four-phase system clock (FOSC).
4:
Q1 is held high during Sleep mode.
MUX
C1
C1POL
C1OUT
To PWM Logic
0
1
2
3
C1ON(1)
C1CH<1:0>
2
0
1
C1R
C1OE
MUX
RD_CM1CON0
Set C1IF
To
C1VIN-
C1VIN+
C12IN0-
C12IN1-
C12IN2-
C12IN3-
C1IN+
DQ
EN
Q1
Data Bus
DQ
EN
CL
Q3*RD_CM1CON0
Reset
C1OUT pin(2)
+
-
0
1
MUX
FVR
C1RSEL
CVREF
C1SP
C1VREF
MUX
C2
C2POL
C2OUT
To PWM Logic
0
1
2
3
C2ON(1)
C2CH<1:0>
2
C2OE
DQ
EN
DQ
EN
CL
RD_CM2CON0
Q3*RD_CM2CON0
Q1
Set C2IF
To
NRESET
C2VIN-
C2VIN+
C2OUT pin(2)
C12IN0-
C12IN1-
C12IN2-
C12IN3-
Data Bus
Note
1:
When C2ON = 0, the C2 comparator will produce a ‘0’ output to the XOR Gate.
2:
Output shown for reference only. See I/O port pin block diagram for more detail.
3:
Q1 and Q3 are phases of the four-phase system clock (FOSC).
4:
Q1 is held high during Sleep mode.
0
1
C2R
MUX
C2IN+
0
1
MUX
FVR
C2RSEL
CVREF
C2SP
C2VREF



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