PIC24F16KA102 datasheet(191/254 Pages) MICROCHIP

191 / 254 page

Preliminary

DS39927B-page 189

PIC24F16KA102 FAMILY

26.0

SPECIAL FEATURES

PIC24F16KA102 family devices include several

features intended to maximize application flexibility and

reliability, and minimize cost through elimination of

external components. These are:

• Flexible Configuration

• Watchdog Timer (WDT)

• Code Protection

• In-Circuit Serial Programming™ (ICSP™)

• In-Circuit Emulation

26.1

Configuration Bits

The Configuration bits can be programmed (read as ‘0’),

or left unprogrammed (read as ‘1’), to select various

device configurations. These bits are mapped starting at

program memory location, F80000h. A complete list is

provided in Table 26-1. A detailed explanation of the

various bit functions is provided in Register 26-1 through

The address, F80000h, is beyond the user program

memory space. In fact, it belongs to the configuration

memory space (800000h-FFFFFFh), which can only be

accessed using table reads and table writes.

TABLE 26-1:

CONFIGURATION REGISTERS

LOCATIONS

FBS: BOOT SEGMENT CONFIGURATION REGISTER

Note:

This data sheet summarizes the features

of this group of PIC24F devices. It is not

intended to be a comprehensive reference

source. For more information on the

Watchdog

Timer,

High-Level

Device

Integration and Programming Diagnostics,

refer to the individual sections of the

“PIC24F

Family

Reference

Manual”

provided below

• Section 9. “Watchdog Timer (WDT)”

(DS39697)

• Section 36. “High-Level Integration

with Programmable High/Low-Voltage

Detect (HLVD)”

(DS39725)

• Section 33. “Programming and

Diagnostics”

(DS39716)

Configuration

Address

FBS

F80000

FGS

F80004

FOSCSEL

F80006

FOSC

F80008

FWDT

F8000A

FPOR

F8000C

FICD

F8000E

FDS

F80010

U-0

R/W-1

—

BSS2

BSS1

BSS0

BWRP

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-4

Unimplemented:

Read as ‘0’

bit 3-1

BSS<2:0>:

Boot Segment Program Flash Code Protection bits

111

= No boot program Flash segment

011

= Reserved

110

= Standard security, boot program Flash segment starts at 200h, ends at 000AFEh

010

= High security boot program Flash segment starts at 200h, ends at 000AFEh

101

= Standard security, boot program Flash segment starts at 200h, ends at 0015FEh(1)

001

= High security, boot program Flash segment starts at 200h, ends at 0015FEh(1)

100

= Reserved

000

= Reserved

bit 0

BWRP:

Boot Segment Program Flash Write Protection bit

= Boot segment may be written

= Boot segment is write-protected

Note 1:

This selection should not be used in PIC24F08KA1XX devices.

PIC24F16KA102 Datasheet(PDF) 191 Page - Microchip Technology

PIC24F16KA102 Datasheet(HTML) 191 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL