PIC24F04KA201 datasheet(138/224 Pages) MICROCHIP

138 / 224 page

PIC24F04KA201 FAMILY

DS39937B-page 136

Preliminary

U1MODE: UART1 MODE REGISTER

R/W-0

U-0

R/W-0

U-0

R/W-0(2)

UARTEN

—

USIDL

IREN(1)

RTSMD

—

UEN1

UEN0

bit 15

bit 8

R/C-0, HC

R/W-0

R/W-0, HC

R/W-0

WAKE

LPBACK

ABAUD

RXINV

BRGH

PDSEL1

PDSEL0

STSEL

bit 7

bit 0

Legend:

C = Clearable bit

HC = Hardware Clearable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

UARTEN:

UART1 Enable bit

= UART1 is enabled; all UART1 pins are controlled by UART1 as defined by UEN<1:0>

= UART1 is disabled; all UART1 pins are controlled by port latches; UART1 power consumption is

minimal

bit 14

Unimplemented:

Read as ‘0’

bit 13

USIDL:

Stop in Idle Mode bit

= Discontinue module operation when device enters Idle mode

= Continue module operation in Idle mode

bit 12

IREN:

IrDA® Encoder and Decoder Enable bit(1)

= IrDA encoder and decoder enabled

= IrDA encoder and decoder disabled

bit 11

RTSMD:

Mode Selection for U1RTS Pin bit

=U1RTS pin in Simplex mode

=U1RTS pin in Flow Control mode

bit 10

Unimplemented:

Read as ‘0’

bit 9-8

UEN<1:0>:

UART1 Enable bits(2)

= U1TX, U1RX and U1BCLK pins are enabled and used; U1CTS pin controlled by port latches

= U1TX, U1RX, U1CTS and U1RTS pins are enabled and used

= U1TX, U1RX and U1RTS pins are enabled and used; U1CTS pin controlled by port latches

= U1TX and UxRX pins are enabled and used; U1CTS and U1RTS/U1BCLK pins controlled by port

latches

bit 7

WAKE:

Wake-up on Start Bit Detect During Sleep Mode Enable bit

= UART1 will continue to sample the U1RX pin; interrupt generated on falling edge, bit cleared in

hardware on following rising edge

= No wake-up enabled

bit 6

LPBACK:

UART1 Loopback Mode Select bit

= Enable Loopback mode

= Loopback mode is disabled

bit 5

ABAUD:

Auto-Baud Enable bit

= Enable baud rate measurement on the next character – requires reception of a Sync field (55h);

cleared in hardware upon completion

= Baud rate measurement disabled or completed

bit 4

RXINV:

Receive Polarity Inversion bit

= U1RX Idle state is ‘0’

= U1RX Idle state is ‘1’

Note 1:

This feature is only available for the 16x BRG mode (BRGH = 0).

Bit availability depends on pin availability.

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